Verilog generator from DUH document Install npm i duh-verilog Usage const duhVerilog = require('duh-verilog'); duhVerilog.generate({ component: { name: 'empty', model: {ports: {clock: 1, reset_n: 1, irq: -1}} } }) /* => module empty ( input clock, input reset_n, output logic irq ); endmodule */